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Written for an advanced-level course in digital systems design, Roth/John’s DIGITAL SYSTEMS DESIGN USING VHDL, 3E integrates the use of the industry-standard hardware description language VHDL into the digital design process. The book begins with a valuable review of basic logic design concepts before introducing the fundamentals of VHDL. The book concludes with detailed coverage of advanced VHDL topics.
- COMPLETELY NEW MATERIAL DETAILS THE ARM INSTRUCTION SET AND DESIGN OF A SIMPLE ARM PROCESSOR. This brand new section in Chapter 9 provides students with a thorough understanding of this most widely used instruction set architecture.
- ARM AND MIPS DESIGNS ARE BOTH PRESENTED SO READERS CAN COMPARE THEM. Students are able to easily see the similarities of the designs despite differences in ISA when choosing behavioral design.
- A NEW CHAPTER EMPHASIZES VERIFICATION (CHAPTER 10). Student gain a strong understanding of various verification techniques with this timely content.
- NEW SECTION HIGHLIGHTS STATIC TIMING ANALYSIS. Students learn how to use this method to validate the design as part of the new chapter (10) on verification.
- NEW DESIGN EXAMPLES CLARIFY CONCEPTS FOR READERS. These design examples visually reinforce and clearly exemplify the skills and concepts that each chapter presents.
- NEW END-OF-CHAPTER PROBLEMS PROVIDE KEY OPPORTUNITIES FOR PRACTICE. These numerous new problems give students valuable hands-on practice in implementing the principles they are learning.
- BOOK OFFERS A MORE DETAILED TREATMENT OF MICROPROGRAMMING. Students become familiar with microprogramming today as they review its uses, strengths and limitations.
- BRIEF OVERVIEW EMPHASIZES SOFTWARE DESIGN FLOW. Students gain an understanding of software design flow with this book’s concise treatment that focuses on principles of mapping, placement, and routings.
- CHAPTER 9 EMPHASIZES MIPS INSTRUCTION SET AND DESIGN OF MIPS PROCESSOR. Students gain a strong understanding of this important instruction set architecture.
- SYNTHESIS IS INTRODUCED EARLY IN THE TEXT. The authors quickly emphasize how to write synthesizable VHDL Code.
- ALL CONTENT REFLECTS IEEE STANDARDS. The authors have carefully used IEEE (Institute of Electrical and Electronics Engineers) standard packages and libraries throughout to prepare students for today’s professional world.
- MATERIAL PRESENTS A GENERAL OVERVIEW WITH EMPHASIS ON KEY POINTS. The authors include references to specific products as examples while the general presentation enhances students’ understanding of the basic principles used in the construction of programmable devices.
- VARIED EXAMPLES PROVIDE FLEXIBILITY FOR INSTRUCTORS. This book’s wealth of examples are intentionally diverse so that you, as the instructor, can select your favorite designs for teaching.
- ALL OF THE VHDL CODE IN THIS EDITION HAS BEEN TESTED USING THE MODELSIM SIMULATOR. The ModelSim Student Edition software and tutorial is available to students at no cost on the ModelSim website.
Combinational Logic. Boolean Algebra and Algebraic Simplification. Karnaugh Maps. Designing with NAND and NOR Gates. Hazards in Combinational Circuits. Flip-Flops and Latches. Mealy Sequential Circuit Design. Design of a Moore Sequential Circuit. Equivalent States and Reduction of State Tables. Sequential Circuit Timing / Tristate Logic and Busses.
2. INTRODUCTION TO VHDL.
Computer-Aided Design. Hardware Description Languages. VHDL Description of Combinational Circuits. VHDL Modules. Sequential Statements and VHDL Processes. Modeling Flip-Flops Using VHDL Processes. Processes Using Wait Statements. Two Types of VHDL Delays: Transport and Inertial Delays. Compilation, Simulation, and Synthesis of VHDL Code. VHDL Data Types and Operators. Simple Synthesis Examples. VHDL Models for Multiplexers. VHDL Libraries. Modeling Registers and Counters Using VHDL Processes. Behavioral and Structural VHDL. Variables, Signals, and Constants. Arrays. Loops in VHDL. Assert and Report Statements.
3. INTRODUCTION TO PROGRAMMABLE LOGIC DEVICES.
Brief Overview of Programmable Logic Devices. Simple Programmable Logic Devices (SPLDs). Complex Programmable Logic Devices (CPLDs). Field-Programmable Gate Arrays (FPGAs).
4. DESIGN EXAMPLES.
BCD to 7-Segment Display Decoder. A BCD Adder. 32-Bit Adders. Traffic Light Controller. State Graphs for Control Circuits. Scoreboard and Controller. Synchronization and Debouncing. A Shift-and-Add Multiplier. Array Multiplier. A Signed Integer/Fraction Multiplier. Keypad Scanner. Binary Dividers.
5. SM CHARTS AND MICROPROGRAMMING.
State Machine Charts. Derivation of SM Charts. Realization of SM Charts. Implementation of the Dice Game. Microprogramming. Linked State Machines.
6. DESIGNING WITH FIELD PROGRAMMABLE GATE ARRAYS.
Implementing Functions in FPGAs. Implementing Functions Using Shannon’s Decomposition. Carry Chains in FPGAs. Cascade Chains in FPGAs. Examples of Logic Blocks in Commercial FPGAs. Dedicated Memory in FPGAs. Dedicated Multipliers in FPGAs. Cost of Programmability. FPGAs and One-Hot State Assignment. FPGA Capacity: Maximum Gates Versus Usable Gates. Design Translation (Synthesis). Mapping, Placement, and Routing.
7. FLOATING-POINT ARITHMETIC.
Representation of Floating-Point Numbers. Floating-Point Multiplication. Floating-Point Addition. Other Floating-Point Operations.
8. ADDITIONAL TOPICS IN VHDL.
VHDL Functions. VHDL Procedures. Attributes. Creating Overloaded Operators. Multi-Valued Logic and Signal Resolution. The IEEE 9-Valued Logic System. SRAM Model Using IEEE 1164. Model for SRAM Read/Write System. Generics. Named Association. Generate Statements. Files and TEXTIO.
9. DESIGN OF A RISC MICROPROCESSOR.
The RISC Philosophy. The MIPS ISA. MIPS Instruction Encoding. Implementation of a MIPS Subset. VHDL Model.
10. HARDWARE TESTING AND DESIGN FOR TESTABILITY.
Testing Combinational Logic. Testing Sequential Logic. Scan Testing. Boundry Scan. Built-In Self-Test.
11. ADDITIONAL DESIGN EXAMPLES.
Design of a Wristwatch / Memory Timing Models. A Universal Asynchronous Receiver Transmitter (UART).
Appendix A: VHDL Language Summary.
Appendix B: IEEE Standard Libraries.
Appendix C: TEXTIO Package.
Appendix D: Projects.
“The authors approach digital system design in a practical and straight forward manner. They provide numerous design examples and discuss current devices. The extensive examples help one understand the relationship between design and implementation.”
“Students have commented that some review topics in this textbook helped them better understand concepts taught in prerequisite courses.”
“I believe the book is valuable as a textbook for an advanced course in digital design, particularly suitable for programmable logic based design with an excellent pedagogy.”
Cengage provides a range of supplements that are updated in coordination with the main title selection. For more information about these supplements, contact your Learning Consultant.
Instructor’s Solutions Manual for Kang’s Electric Circuits
Complimentary to faculty who adopt the text, the Instructor’s Solutions Manual contains solutions to all the problems in the main text. For your convenience, this manual is available for download from the password-protected instructor’s section of the companion website. All users require a verified instructor log-in to access the site.
Instructor’s Companion Website for Kang’s Electric Circuits
This Companion Site contains helpful instructor-only resources, including PowerPoint® Slides containing Lecture Notes. The site also includes the Instructor’s Solutions Manual and test banks. Users require a verified instructor log-in to access this site.