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This book will teach students how to design digital logic circuits, specifically combinational and sequential circuits. Students will learn how to put these two types of circuits together to form dedicated and general-purpose microprocessors. This book is unique in that it combines the use of logic principles and the building of individual components to create data paths and control units, and finally the building of real dedicated custom microprocessors and general-purpose microprocessors. After understanding the material in the book, students will be able to design simple microprocessors and implement them in real hardware.

Enoch O. Hwang, La Sierra University

Dr. Enoch Hwang has a Ph.D. in Computer Science from the University of California, Riverside. He currently serves as a Professor of Computer Science at La Sierra University in Southern California, teaching digital logic and microprocessor design. In 2015, Dr. Hwang was invited to serve as a visiting professor to Zhejiang University in Hangzhou, China, where he taught their Digital Systems Design course. Many new ideas from that class have been incorporated into this edition of the book. From as early as childhood, Dr. Hwang was fascinated with electronic circuits. In one of his first experiments, he attempted to connect a microphone to the speaker inside a portable radio through the earphone plug. Instead of hearing sound from the microphone through the speaker, smoke was seen coming out of the radio. Thus ended that experiment and his family’s only radio. He now continues on his interest in digital circuits with research in embedded microprocessor systems, controller automation, power optimization, and robotics.
  • Contains many complete examples.
  • Both schematic and VHDL code for all examples.
  • Actual implementation of the circuits on the optional Altera UP2 development board.
  • Teaches students how to implement a working microprocessor that they have designed on a FPGA chip (real hardware).
Chapter 1. Designing Microprocessors
1.1 Overview of a Microprocessor
1.2 Design Abstraction Levels
1.3 Examples of a 2-to-1 Multiplexer
1.4 Introduction to VHDL
1.5 Synthesis
1.6 Going Forward
1.7 Summary Checklist
1.8 Problems

Chapter 2. Digital Circuits
2.1 Binary Numbers
2.2 Binary Switch
2.3 Basic Logic Operators and Logic Expressions
2.4 Truth Tables
2.5 Boolean Algebra and Boolean Function
2.6 Minterms and Maxterms
2.7 Canonical, Standard, and non-Standard Forms
2.8 Logic Gates and Circuit Diagrams
2.9 Example: Designing a Car Security System
2.10 VHDL for Digital Circuits
2.11 Summary Checklist
2.12 Problems

Chapter 3. Combinational Circuits
3.1 Analysis of Combinational Circuits
3.2 Synthesis of Combinational Circuits
3.3 * Technology Mapping
3.4 Minimization of Combinational Circuits
3.5 * Timing Hazards and Glitches
3.6 7-Segment Decoder Example
3.7 VHDL for Combinational Circuits
3.8 Summary Checklist
3.9 Problems

Chapter 4. Standard Combinational Components
4.1 Signal Naming Conventions
4.2 Adder
4.3 Two�s Complement Binary Numbers
4.4 Subtractor
4.5 Adder-Subtractor Combination
4.6 Arithmetic Logic Unit
4.7 Decoder
4.8 Encoder
4.9 Multiplexer
4.10 Tri-state Buffer
4.11 Comparator
4.12 Shifter-Rotator
4.13 Multiplier
4.14 Summary Checklist
4.15 Problems

Chapter 5. * Implementation Technologies
5.1 Physical Abstraction
5.2 Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)
5.3 CMOS Logic
5.4 CMOS Circuits
5.5 Analysis of CMOS Circuits
5.6 Using ROMs to Implement a Function
5.7 Using PLAs to Implement a Function
5.8 Using PALs to Implement a Function
5.9 Complex Programmable Logic Device (CPLD)
5.10 Field-Programmable Gate Array (FPGA)
5.11 Summary Checklist
5.12 Problems

Chapter 6. Latches and Flip-Flops
6.1 Bistable Element
6.2 SR Latch
6.3 SR Latch with Enable
6.4 D Latch
6.5 D Latch with Enable
6.6 Clock
6.7 D Flip-Flop
6.8 D Flip-Flop with Enable
6.9 Asynchronous Inputs
6.10 Description of a Flip-Flop
6.11 Timing Issues
6.12 Example: Car Security System � Version 2
6.13 VHDL for Latches and Flip-Flops
6.14 * Flip-Flop Types
6.15 Summary Checklist
6.16 Problems

Chapter 7. Sequential Circuits
7.1 Finite-State-Machine (FSM) Model
7.2 State Diagrams
7.3 Analysis of Sequential Circuits
7.4 Synthesis of Sequential Circuits
7.5 Unused State Encodings and the Encoding of States
7.6 Example: Car Security System � Version 3
7.7 VHDL for Sequential Circuits
7.8 * Optimization for Sequential Circuits
7.9 Summary Checklist
7.10 Problems

Chapter 8. Standard Sequential Components
8.1 Registers
8.2 Shift Registers
8.3 Counters
8.4 Register Files
8.5 Static Random Access Memory
8.6 * Larger Memories
8.6.1 More Memory Locations
8.7 Summary Checklist
8.8 Problems

Chapter 9. Datapaths
9.1 General Datapath
9.2 Using a General Datapath
9.3 Timing Issues
9.4 A More Complex General Datapath
9.5 Dedicated Datapath
9.6 Designing Dedicated Datapaths
9.7 Using a Dedicated Datapath
9.8 VHDL for Datapaths
9.9 Summary Checklist
9.10 Problems

Chapter 10. Control Units
10.1 Constructing the Control Unit
10.2 Examples
10.3 Generating Status Signals
10.4 Timing Issues
10.5 Standalone Controllers
10.6 * ASM Charts and State Action Tables
10.7 VHDL for Control Units
10.8 Summary Checklist
10.9 Problems

Chapter 11. Dedicated Microprocessors
11.1 Manual Construction of a Dedicated Microprocessor
11.2 Examples
11.3 VHDL for Dedicated Microprocessors
11.4 Summary Checklist
11.5 Problems

Chapter 12. General-Purpose Microprocessors
12.1 Overview of the CPU Design
12.2 The EC-1 General-Purpose Microprocessor
12.3 The EC-2 General-Purpose Microprocessor
12.4 VHDL for General-Purpose Microprocessors
12.5 Summary Checklist
12.6 Problems

Appendix A. Schematic Entry Tutorial 1
A.1 Getting Started
A.2 Using the Graphic Editor
A.3 Specifying the Top-Level File and Project
A.4 Synthesis for Functional Simulation
A.5 Circuit Simulation
A.6 Creating and Using the Logic Symbol

Appendix B. VHDL Entry Tutorial 2
B.1 Getting Started
B.2 Synthesis for Functional Simulation
B.3 Circuit Simulation

Appendix C. UP2 Programming Tutorial 3
C.1 Getting Started
C.2 Synthesis for Programming the PLD
C.3 Circuit Simulation
C.4 Using the Floorplan Editor
C.5 Fitting the Netlist and Pins to the PLD
C.6 Hardware Setup
C.7 Programming the PLD
C.8 Testing the Hardware
C.9 MAX7000S EPM7128SLC84-7 Summary
C.10 FLEX10K EPF10K70RC240-4 Summary

Appendix D. VHDL Summary
D.1 Basic Language Elements
D.2 Dataflow Model Concurrent Statements
D.3 Behavioral Model Sequential Statements
D.4 Structural Model Statements
D.5 Conversion Routines


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  • ISBN-10: 0534465935
  • ISBN-13: 9780534465933
  • Bookstore Wholesale Price $165.75
  • RETAIL $219.95

Cengage provides a range of supplements that are updated in coordination with the main title selection. For more information about these supplements, contact your Learning Consultant.


Companion Website for Hwang’s Digital Logic and Microprocessor Design with Interfacing

ISBN: 9781305859517
The Companion Site contains free helpful instructor-only resources, including a set of PowerPoint® Slides containing Lecture Notes for instructors. The Instructor’s Solutions Manual, Labs, and a supplemental chapter on Implementation Technologies are also available for download from this secure website. A verified instructor log-in is required to access the site.

Instructor’s Solutions Manual

ISBN: 9781337115568
Complimentary to faculty who adopt the text, the Instructor’s Solutions Manual contains solutions to all the problems in the main text. For your convenience, this manual is available for download from the password protected instructor’s section of the companion website. A verified instructor log-in is required to access the site.