Intel Xeon Phi Coprocessor High Performance Programming, 1st Edition

  • Published By:
  • ISBN-10: 0124104940
  • ISBN-13: 9780124104945
  • DDC: 004.1
  • Grade Level Range: College Freshman - College Senior
  • 432 Pages | eBook
  • Original Copyright 2013 | Published/Released June 2014
  • This publication's content originally published in print form: 2013

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Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.

Table of Contents

Front Cover.
Half Title Page.
Title Page.
Copyright Page.
1: Introduction.
2: High Performance Closed Track Test Drive!.
3: A Friendly Country Road Race.
4: Driving Around Town: Optimizing A Real-World Code Example.
5: Lots of Data (Vectors).
6: Lots of Tasks (Not Threads).
7: Offload.
8: Coprocessor Architecture.
9: Coprocessor System Software.
10: Linux on the Coprocessor.
11: Math Library.
12: MPI.
13: Profiling and Timing.